Subharmonically pumped mixer

ABSTRACT

The present invention relates to a sub-harmonically pumped conversion mixer arrangement that includes a transistor arrangement and transistor terminals for application of a local oscillator, LO-, signal and application of a radio frequency, RF-, signal and for extraction of a mixed intermediate frequency, IF-, signal. The transistor arrangement includes at least one NMOS transistor and at least one PMOS transistor. The drain of the at least one NMOS transistor is interconnected with the drain of the at least one PMOS transistor, and in that the gate of the at least one PMOS transistor is interconnected with the gate of the at least one NMOS transistor.

FIELD OF THE INVENTION

The present invention relates to a subharmonically pumped conversionmixer arrangement which comprises a transistor arrangement andtransistor terminal ports for application of a local oscillator signaland application/extraction of a radio frequency signal andextraction/application of a mixed intermediate signal.

STATE OF THE ART

Mixers are among others used in radio systems in order to realizefrequency shifts and actually constitute a most critical building blockin a radio system. Different kinds of mixers are known. One type of amixer is the so-called subharmonically pumped mixer. A subharmonicallypumped mixer is driven by a local oscillator (LO) signal, the frequencyof which is only half or more generally a fraction, e.g. ⅓, ¼ of thelocal oscillator frequency for a fundamental mixer. It is attractivewith mixers having low LO power requirements, a large frequencybandwidth range as compared to other mixers such as for example activeFET mixers and diode mixers, and which are well-suited for highly linearmixing operations. Subharmonically pumped resistive mixers have theadvantages of a good LO-RF and LO-IF isolation respectively due to LOfrequency being different from the IF frequency and the RF frequency,which particularly facilitates filtering, and under some circumstancesalso due to the differential LO-signal. However, such architecturesrequire an LO balun which may occupy a large part of the chip area, or adifferential VCO. Subharmonic mixers are attractive for several reasonsamong others because a low phase noise LO source is easy to achievesince the LO frequency is allowed to be a fraction, e.g. half of the LOfrequency of a conventional (non-subharmonical) mixer. Especially in themillimeterwave range a low phase noise LO source is not easy to achieve.In several subharmonic mixers, as referred to above, a balun or adifferential signal generating circuit has to be used in order toprovide two LO-signals which are 180 degrees out of phase with respectto one another. Those two LO-signals will drive two parallel connectedFET devices at the gate terminals. Such a conversional subharmonicpassive mixer 10 ₀ is illustrated in FIG. 1 and it constitutes a stateof the art subharmonic mixer. FIG. 1 shows a first FET transistor 1 ₀and a second FET transistor 2 ₀ with interconnected drains. TheRF-signal is applied at the interconnected drains and the IF signal isextracted from the interconnected drains and at the RF input an RF(bandpass) filter is provided and at the IF output an IF filter isprovided to filter out the RF components and any other unwanted signals.The two LO-signals will drive the two parallel-connected FET devices 1₀, 2 ₀ at the gate terminals and these two active devices hence work athalf-cycle of the signal alternatingly. A balun 21 ₀ is connected at thegates.

“A subharmonically pumped resistive dual-HEMT-mixer” by H. Zirath, Proc.of IEEE MTT-S, pp. 875-878, 1991 shows a subharmonically pumped HighElectronic Mobility Transistor (HEMT)-based resistive mixer which isbased on a parallel-HEMT configuration where the LO is applied to thegates with the same amplitude but with opposite phase. It isadvantageous that the LO frequency is only half of the frequency neededto pump a fundamental mixer and that the AM-LO noise is suppressed andfurther that the RF and LO frequencies are widely separated, whichfacilitates the construction of the filter. The shown mixer is based ona paralleled HEMT configuration which means that the mixing elementbasically consists of two HEMTs where the sources and the drains arecoupled together. The local oscillator is applied to both gates with thesame amplitude but 180 degrees out of phase. The RF-signal is applied tothe drains and the frequency mixing occurs due to the time-variablechannel conductance. The conductance waveform contains only evenharmonics of the LO. The intermediate frequency is extracted from thedrain through an IF-filter.

“Design and analysis of miniature W-band MMIC subharmonically pumpedresistive mixer” by M. F. Lei, et al., Proc. of IEEE MTT-S, pp. 235-238,2004 shows another subharmonically pumped resistive mixer.

However, subharmonic mixers in which two FETs operate in the trioderegion suffer from problems with large conversion losses, typicallylarger than 10 dB, which may be far too much for many kinds ofapplications. Furthermore, an on-chip balun or differential signalgenerating circuitry consumes a very large chip area, which is verydisadvantageous. Hence, today known subharmonic mixers suffer amongothers from drawbacks of consuming too much chip area, and having highconversional losses and they may also suffer from linearity problems.“Compact 28-GHz subharmonically pumped resistive mixer MMIC using alumped-element high-pass/band-pass balun” by P. C. Yeh et al., IEEEMicrowave and Wireless Component Letters, Vol. 15, No. 2, pp. 62-64,February 2005 shows a subharmonically pumped resistive mixer whereinefforts are made to reduce the size of the indispensable balun. A lumpedelement balun is therefore suggested as an alternative to a Marchandbalun consisting of coupled transmission lines. The lumped element balunis made of four inductors and three capacitors. However, such a balunstill uses a large portion of the chip area of the mixer and it,additionally, suffers from the disadvantage of a limited frequencybandwidth.

SUMMARY OF THE INVENTION

What is needed is therefore a subharmonically pumped conversion mixerarrangement which has low conversion losses. Still further asubharmonically pumped conversion mixer arrangement is needed which hasa large frequency bandwidth. Still further a mixer arrangement is neededwhich can be made small, consumes a small chip area only, and which ischeap and easy to fabricate. Still further a mixer arrangement is neededwhich has a good linearity. Particularly a mixer arrangement is neededwhich is applicable for all frequencies, particularly for microwavefrequencies as well as for millimeter frequencies. Moreover a mixerarrangement is needed which does not require such a large chip area ashitherto known subharmonically pumped mixers do. Particularly a mixerarrangement is needed which does not require an LO balun or adifferential VCO.

Therefore here a subharmonically pumped conversion mixer arrangement asinitially referred to is provided wherein the transistor arrangementcomprises at least one NMOS transistor and at least one PMOS transistorwherein the drain of said at least one NMOS transistor is interconnectedwith the drain of said PMOS transistor. Further the gates of said PMOStransistor and NMOS transistor are interconnected. In such a mixerarrangement no balun and no differential signal generating (combining)circuit is needed. Therefore the mixer can be made much smaller, andthere is no excessive consumption of chip area like in the case when(large) baluns are required. In particular embodiments the mixercomprises a down-conversion mixer. Then particularly the intermediatefrequency IF-signal is extracted from the interconnected drains. Inalternative embodiments it comprises an up-conversion mixer, in thatcase the RF-signal is particularly extracted from the interconnecteddrains.

In advantageous implementations the mixer arrangement is passive. Thenthe source of the NMOS and the source of the PMOS are equally biased, orgrounded.

In other embodiments it is active, and the sources are DC-biasedindependently or (somewhat) differently. More specifically expressed,each transistor (NMOS and PMOS) then has a DC voltage difference betweensource and drain, which has as a consequence that the sources will bedifferently biased.

For a passive embodiment the same bias is applied to the source NMOS andPMOS transistors respectively or they are both grounded. If for examplethere is a somewhat higher voltage at the PMOS source, a slight DCcurrent component will flow therethrough which means a smallerconversion loss. If however there is no voltage between the NMOS andPMOS sources respectively, there is substantially no DC current flowing(or only a very low DC current).

In a particularly advantageous embodiment, for application of the LOsignal, application or extraction of the RF-signal, and for extractionor application of the IF-signal, separate transistor terminals are used.

In a particular embodiment the interconnected drains form a draintransistor terminal which in one embodiment is adapted to provide forextraction of the IF-signal (for a down-conversion mixer); otherwise,for an up-conversion mixer, for extraction of the RF-signal. Mostparticularly an IF-filter is arranged at the common drain transistorterminal. It should be clear that this is not necessary but advantageousin so far that a sum signal and/or a difference signal, or moregenerally unwanted signal components, can be eliminated. I.e. theIF-filter can be adapted to filter out e.g. all but the wantedIF-signal. Preferably an impedance circuit, for example comprising aninductor with a high inductance or a large resistor with a highresistance or a λ/4 transmission line, is connected to theinterconnected sources, which impedance circuit has a high AC impedanceand a low DC impedance. The impedance circuit may alternatively oradditionally comprise impedance matching means which e.g. improves thegain. Such an impedance circuit is particularly only needed if thesources are interconnected or if a signal is applied at the sources andform a separate source terminal in order to set the DC-level, e.g. toground or any other appropriate level. It preferably has a highimpedance for an AC-signal and a low DC impedance.

In particular implementations where separate transistor ports are usedfor application of LO-signals and application/extraction of RF-signalsIF-signals respectively, one transistor terminal is provided at theinterconnected sources forming a source terminal and the localoscillator signal may for example be applied at said source terminalhence forming an LO-signal port. Even more particularly a gatetransistor terminal is provided at the interconnected gates and theRF-signal is applied at said gate terminal hence forming an RF-signalport, again for a down-conversion mixer. Alternatively the gatetransistor terminal provided at the interconnected gates is used forapplication of the local oscillator signal. The source terminal providedat the interconnected sources may also be used for application(extraction) of the RF-signal, hence forming an RF-signal port.

In other particular embodiments the drain terminal forms a multiplesignal terminal or a dual drain terminal. Then, particularly theLO-signal may be applied at the gate terminal and the RF-signal isapplied at the drain terminal. More particularly, also for adown-conversion mixer, the LO-signal may be applied at the drainterminal and the IF-signal be extracted from the same drain terminalthen generally requiring a filter on each terminal branch. Alternativelythe RF-signal is applied at the dual drain terminal and the IF-signal isextracted from said dual drain terminal as well in which case preferablyeach branch is provided with a filter. The RF-signal is then, in thefirst case, applied at the interconnected gate terminal or, in thesecond case, the LO-signal here is applied at the interconnected gateterminal.

All these embodiments relate to down-conversion mixers. IF-signal portsand RF-signal ports are exchanged.

Most particularly the sources are equally biased, or for examplegrounded, for a passive implementation or differently biased for anactive implementation. In a particular embodiment a gate biasingcircuit, for example a gate impedance, is connected to theinterconnected gates.

According to advantageous implementations filters are connected to theinterconnected gates and/or to interconnected drains and, if applicable,to interconnected sources. It should be clear that it is not necessaryto have filters but that filters can be provided for at some of thelocations but not all etc. It should be clear that, throughout thisapplication, a filter is taken to mean a filter or an impedance matchingmeans or a combination of both.

In particular implementations, with a dual drain terminal, an LO-filteror an RF-filter may be provided at the dual drain terminal whereas anintermediate frequency, IF-, filter also is provided in order toseparate between the applied LO-/RF-signal and the extracted IF-signalrespectively. Unless it is explicitly stated to be otherwise, thearrangements described refer to down-conversion mixers. It should beclear as referred to above that the mixer arrangement in all cases alsocan be used as an up-conversion mixer but in that case the RF-andIF-ports are exchanged.

Particularly the mixer arrangement is implemented as a MonolithicMicrowave Integrated Circuit, MMIC. Particularly the mixer is adapted tohandle RF-and LO-signals in the microwave frequency. It may also beadapted to handle RF-and LO-signals in the millimeter wave frequencyregion. However, it should be clear that it can be used also for anyother frequency range.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will in the following be further described, in anon-limiting manner, and with reference to the accompanying drawings, inwhich:

FIG. 1 shows a state of the art conversional subharmonic mixer,

FIG. 2 shows a first embodiment of a down-conversion mixer with separateports for RF-, LO-, IF-signals,

FIG. 3 shows a second embodiment of a down-conversion mixer withseparate ports for LO-, RF-, IF-signals,

FIG. 4 shows an alternative embodiment of a down-conversion mixer,

FIG. 5 shows still another embodiment of a down-conversion subharmonicmixer,

FIG. 6 shows a first embodiment of an up-conversion subharmonic mixer,

FIG. 7 shows a second embodiment of an up-conversion subharmonic mixer,

FIG. 8 shows an embodiment of a down-conversion mixer with a dualterminal at interconnected drains,

FIG. 9 shows an alternative embodiment of a down-conversion mixer with adual port at drain,

FIG. 10 shows a third embodiment of an up-conversion subharmonic mixerwith a dual port at drain, and

FIG. 11 shows a first embodiment of an active implementation of asubharmonic mixer according to the invention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 shows a conversional subharmonic passive mixer according to thestate of the art as already discussed in the state of the art section ofthe specification. It comprises two FET transistors 1 ₀, 2 ₀ and it isdriven by an LO-signal the frequency of which is half of the LOfrequency for a fundamental mixer. Balun 21 ₀ has to be used in order toprovide two LO-signals shifted 180° in phase with respect to oneanother, which two LO-signals drive the two parallel-connected FETdevices at the gate terminals. (Alternatively a differential VCO couldhave been used.) The RF-signal is applied, via a filter 5 ₀₁ at thedrain and the IF-signal is, over filter 5 ₀₂ extracted at drain as well.The disadvantages of such an arrangement have already been discussed andwill therefore not be considered again.

FIG. 2 shows a first embodiment of a subharmonically pumped conversionalmixer according to the invention. This particular embodiment shows apassive mixer 10 ₁ used as a down-conversion mixer. Since the CMOStechnology provides a possibility to develop low-cost circuits operatingat microwave and millimeterwave frequencies and, in addition theretoprovides NMOS and PMOS simultaneously, it has been realized that theircomplementary property can be used to build subharmonic mixers with lowconversion losses on a small chip area since no on-chip (or off-chip)balun is required as well as no differential signal generatingcircuitry.

In the subharmonically pumped conversional mixer 10 ₁ shown in FIG. 2,the drains of the PMOS transistor 1 ₁ and of the NMOS transistor 2 ₁ areinterconnected or coupled to one another and also the gates of the PMOSand NMOS respectively are interconnected. In this embodiment theLO-signal is applied at the sources which is extremely advantageous inthat the conversion losses get smaller than when the LO-signal isapplied at the gates. The RF-signal is applied at the gate, and forDC-biasing purposes an impedance Z_(g) 3 ₁ is provided at the connectionto the gates in parallel with which the RF-signal is applied, in orderto provide for a DC-biasing. The impedance Z_(g) 3 ₁ may also comprisean impedance matching functionality. Since the mixer 10 ₁ acts as apassive mixer, the PMOS and the NMOS transistors 1 ₁, 2 ₁ are biased inthe same way which means that no DC-currents will flow between orthrough any of them. Particularly an impedance Z_(s) 4 ₁ is provided atthe source connection in order to ground or to set the DC level, i.e.instead of grounding it is possible to bias at other voltages, which isapplicable to all embodiments. Particularly impedance Z_(s) 4 ₁ has ahigh impedance for AC and a low impedance for DC and it may for examplecomprise an inductor with a high inductance or a resistor with a highresistance. The IF-signal is extracted from the interconnected drains.In this embodiment there are different ports, one for each signal, i.e.all three signals LO, RF, IF use separate transistor terminals which isvery advantageous in that the isolation between ports is improved andeach port can be matched independently. This is not necessary for thefunctioning of the inventive concept but it relates to an extremelyadvantageous implementation.

The impedance Z_(s) 4 ₁ at the source is used to isolate the AC-signalfrom the ground at the same time as it provides a DC ground for thesources. The drains may also be DC grounded through the IF port, but itis not necessary. When the LO-signal is applied at the interconnectedsources, even though particularly both drain and source are DC grounded,the NMOS transistor 2 ₁ may partly operate in the saturation region whenthe instantaneous drain-to-source voltage is positive during the lowerhalf-cycle of the LO-signal swing. Meanwhile the PMOS transistor 1 ₁ mayoperate in the saturation region during the higher half-cycle of theLO-signal swing. This is extremely advantageous for reduction of theconversion losses. Due to the complementary property of the NMOS andPMOS transistors, each of them will work for half of an LO-cycle in analternating manner even if they are derived by the same LO-signal. TheIF frequency component |ω_(L)-ω_(R)| will be cancelled at the drain,ω_(L) and ω_(R) being the angular frequencies of the LO-and RF-signalrespectively. The other IF frequency component |2ω_(L)-ω_(R)| will beadded constructively and this is the wanted IF-signal which isextracted. In this general embodiment shown in FIG. 2 there is no filterbut in other, advantageous implementations the wanted IF-signal is e.g.extracted over a filter, cf. for example FIG. 4.

Due to the interconnection of the drains of the PMOS and NMOStransistors respectively, the fundamental IF frequency |ω_(L)-ω_(R)| iscancelled.

FIG. 3 shows another subharmonically pumped conversional mixer 10 ₂ witha PMOS transistor 1 ₂ and a NMOS transistor 2 ₂. The IF-signal is alsoin this embodiment extracted at the interconnected drains. Further, alsoin this embodiment an impedance Z_(s) 4 ₂ is provided at theinterconnected sources in order to isolate the AC signal from ground toprovide a DC ground for the sources or to set the DC level at somerelevant level. For exemplifying reasons it is here shown a voltagebiasing V_(bs), although it may of course also be ground as e.g. in FIG.2 above. However, in this case the LO-signal is applied, here, inparallel with impedance Z_(g) 3 ₂ to the gates which also areinterconnected and equally biased meaning that also this mixer ispassive. When the LO-signal is applied at the gates, the transistors 1₂, 2 ₂ will operate in the triode region which gives rise to higherconversion losses for a subharmonic mixer than if the LO-signal isapplied at the sources as in FIG. 2. Still, however, there is no needfor a balun or any differential signal generating circuits consuming alarge chip area. In addition thereto, such an arrangement requires lowerLO power than an arrangement where the LO-signal is applied at thesources. Therefore also a conversional subharmonically pumped mixer 10 ₂as described in FIG. 3 still shows considerable advantages over priorart subharmonic mixers.

FIG. 4 shows still another embodiment of a passive subharmonicallypumped conversional mixer 10 ₃ which is very similar to that of FIG. 2.Also here the LO-signal is input at the interconnected sources, theIF-signal is extracted at the interconnected drains and the RF-signal isinput in parallel with impedance Z_(g) 3 ₃ to the interconnected gates.Also here an impedance Z_(s) 4 ₃ is provided at the sources to isolatethe AC-signal from ground and to set the DC-level for the sources.However, in this case filters (with or without an impedance matchingfunctionality as discussed above) are provided, most particularly afilter 6 ₃ at the interconnected drain terminal for extraction of, here,the IF-signal. Although the filter 6 ₃ is not actually necessary, it isadvantageous in order to for example separate unwanted mixer productsfrom the desired signal. In this case also the LO-signal is applied overa filter 7 ₃ and the RF-signal is applied over a filter 5 ₃ connected tothe gate terminal.

It should be clear that one or more of these filters and/or impedancematching means can be excluded.

FIG. 5 shows still another embodiment of a subharmonically pumpedconversional mixer 10 ₄ which here substantially corresponds to themixer 10 ₂ of FIG. 3 but with the difference that filters 6 ₄, 7 ₄ and 5₄ are provided at the interconnected drain terminal, at theinterconnected source terminal for RF input and at the interconnectedgate terminal for LO input respectively. This mixer is also used fordown-conversion. The transistors 1 ₄, 2 ₄ and the impedances Z_(s) 4 ₄and Z_(g) 3 ₄ generally correspond to those of FIG. 3 and also in otherrespects this embodiment is similar to that of FIG. 3. It should beclear that also here not all filters are necessary but preferably atleast a filter at the interconnected drains for extraction of theIF-signal is included. Impedances and filters may, as referred toearlier comprise impedance matching means, or not.

FIG. 6 shows a first embodiment of a subharmonically pumped conversionmixer 10 ₅ adapted to be used for up-conversion. It actually correspondsto the mixer of FIG. 2 with a PMOS transistor 1 ₅ and an NMOS transistor2 ₅ with interconnected or short circuited drains, interconnected gatesand also interconnected sources. Also here impedance Z_(s) 4 ₅ isprovided at the interconnected sources as in FIG. 2, as well as animpedance Z_(g) 3 ₅ at the interconnected gates, although this is notcompulsory. The difference is that here the RF-signal is extracted fromthe drains whereas the IF-signal is applied at the gates. The LO-signalis applied at the interconnected sources. There are separate transistorterminals acting as LO-, RF-, and IF-ports respectively.

FIG. 7 shows still another embodiment of an up-conversion mixer 10 ₆which substantially corresponds to that of FIG. 5 and hence comprises aPMOS transistor 1 ₆, and an NMOS transistor 2 ₆, source impedance Z_(s)4 ₆ and gate impedance Z_(g) 3 ₆. The LO-signal is input at theinterconnected gates over a filter 5 ₆ and preferably the impedance 3 ₆,the transistor terminal ports used for IF extraction and RF applicationrespectively have been switched such that the RF-signal is extractedfrom the interconnected drain terminal, here over a filter 6 ₆ whereasthe IF-signal is applied at the interconnected source terminal, hereover a filter 7 ₆. As discussed above with reference for example to FIG.5, not all the filters are indispensable but various differentimplementations are possible and one or more of them may compriseimpedance matching means as well.

In FIG. 8 an alternative implementation of a subharmonically pumpedconversional mixer used for down-conversion 10 ₇ is illustrated. In thisembodiment, however, comprising a CMOS transistor 1 ₇ and an NMOStransistor 2 ₇, the LO-signal is input at the interconnected drainterminal, particularly over a filter 8 ₇ and the IF-signal is extractedat drain over a filter 6 ₇. The RF-signal is applied, in parallel withimpedance Z_(g) 3 ₇, which is optional and/or possibly a filter, and/orimpedance matching means at the interconnected gates. Hence, here thereare not separate transistor terminals that can be used for each signalwhich means that the isolation between the ports is somewhat inferior tothat as described with reference to the previous embodiments and theports cannot be matched entirely independently. On the other hand, it isin this case easier to set the bias level of the interconnected sources;it is sufficient to connect to ground and no signal is needed there. Itshould be clear that a filter also could be provided at the RF input.The filters 8 ₇, 6 ₇ are not indispensable, but are preferred inembodiments with a terminal acting as a dual port in order to separatethe components of, here, the RF-signal and of the IF-signal respectivelyfrom one another, or more generally the desired signal from unwantedsignal components.

FIG. 9 shows still another implementation of a down-conversionsubharmonically pumped passive mixer 10 ₈ comprising a PMOS transistor 1₈ and an NMOS transistor 2 ₈ with interconnected drains andinterconnected gates. In this embodiment the LO-signal is applied inparallel with impedance 3 ₈ to the gates, the sources are simplygrounded as in FIG. 8 above and the RF-signal is applied at theinterconnected drains over a filter 8 ₈ whereas the IF-signal isextracted from the interconnected drains, preferably with the use of afilter 6 ₈ to separate or filter out the RF-signal components, or moregenerally unwanted components.

FIG. 10 shows a passive subharmonically pumped mixer 10 ₉ used forup-conversion which comprises a PMOS transistor 1 ₉ and an NMOStransistor 2 ₉, the sources of which e.g. are grounded. In thisembodiment the LO-signal is input over a filter 8 ₉ at theinterconnected drains and the RF-signal is extracted, over a filter 6 ₉,also at the interconnected drains. This means that the common transistorterminal is used for both the signals, acting as a dual port. It shouldbe clear that one or more of these filters are optional. The IF-signalis applied at the interconnected gates, here over a filter 5 ₉(optional) and in parallel with an impedance 3 ₉. This figure isincluded merely for the purposes of illustrating that also forup-conversion, mixers wherein one terminal is used for two differentsignals, can be used. Of course other variations are also possible. Inthis case filters 8 ₉, 6 ₉ are of importance if the LO-, and theRF-signals are to be separated appropriately.

Finally, in FIG. 11 an implementation of an active subharmonicallypumped conversional mixer is shown. The voltage biasing of the PMOS andthe NMOS respectively can be said to be slightly different. If forexample the voltage is somewhat higher at the PMOS source, a low currentwith flow therethrough which gives a lower conversion loss.

The shown mixer arrangement 10 ₁₀ comprises a PMOS transistor 1 ₁₀ andan NMOS transistor 2 ₁₀. The drains of the transistors 1 ₁₀, 2 ₁₀ areinterconnected as well as the sources. Here a capacitor 11 ₁₀ isprovided between the differently biased sources. The LO-signal isapplied to the interconnected, differently biased sources and theIF-signal is extracted over filter 6 ₁₀ (optional and with or without animpedance matching functionality). There are in this embodiment onetransistor terminal for each signal, although embodiments with dualsignal ports also are possible. The RF-signal is applied at theinterconnected gates.

The biasing V_(gp) and V_(gn) can be different or the same. IfV_(gp)=V_(gn), the capacitors 9 ₁₀₁, 9 ₁₀₂ between the gates are notneeded. The drain biasing of the PMOS and the NMOS transistor could alsobe different. In that case at least one capacitor is needed between thetwo drain nodes as well as a bias impedance for each is needed. All theimpedances (here Z_(g) 3 ₁₀₁, Z_(g) 3 ₁₀₂, Z_(s) 4 ₁₀) are componentsblocking RF-signals but letting DC-signals through. This means that theyhave a high RF impedance and a finite DC impedance, e.g. comprising alarge inductor or resistor. An advantage with an active implementationis that it can get a better gain—or lower losses. On the other hand ittends to be somewhat more complicated than a passive implementation, andconsumes power.

It should be clear that the active implementations also can be providedfor up-conversion.

For passive implementations, the interconnected drains, gates andsources means that they are AC-and DC-interconnected. In activeimplementations the gates are normally only AC-interconnected, althoughthey might also in some cases be DC-interconnected as well. In passiveimplementations, interconnected gates relates to AC-as well asDC-interconnection. In the active implementations the sources aregenerally only AC-interconnected. For active as well as passiveimplementations, by interconnected drains is meant that they areAC-preferably also DC-interconnected although it is not necessary.However, also some less preferable implementations may be possible.

The invention is of course not limited to the specifically illustratedembodiments but can be varied in a number of ways within the scope ofthe appended claims.

1. A sub-harmonically pumped conversion mixer arrangement comprising: atransistor arrangement and transistor terminals for application of alocal oscillator (LO) signal and receiving and extracting a radiofrequency (RF) signal and for receiving and extracting a mixedintermediate frequency (IF) signal, the transistor arrangement furthercomprising: at least one NMOS transistor and at least one PMOStransistor, the drain of said at least one NMOS transistor beinginterconnected with the drain of said at least one PMOS transistor andthe gate of said at least one PMOS transistor being interconnected withthe gate of said at least one NMOS transistor, wherein the source of thePMOS transistor is interconnected with the source of the NMOStransistor; and wherein the transistor arrangement comprises threeseparate transistor terminals, a gate terminal, a source terminal and adrain terminal, the terminals being adapted to provide a separate portfor each of the LO, RF and IF signals respectively.
 2. The mixerarrangement according to claim 1, being passive wherein the sources ofthe NMOS and PMOS transistors are one selected from (i) being not biasedor (ii) biasing means are provided for equally biasing the sources ofthe NMOS and the PMOS transistors, or (iii) there is no DC-voltagedifference between source and drain of the respective PMOS and NMOStransistors.
 3. The mixer arrangement according to claim 1, being activewherein biasing means are provided for one of (i) biasing the source ofthe PMOS transistor independently or differently from the source of theNMOS transistor, or (ii) biasing only the source of the PMOS transistoror the source of the NMOS transistor respectively, or (iii) the sourcesare biased such that there is a DC-voltage difference between the drainand source of the respective PMOS and NMOS transistors.
 4. The mixerarrangement according to claim 3, wherein biasing means are provided forbiasing the gates of the PMOS and NMOS transistors independently and/ordifferently.
 5. The mixer arrangement according claim 1 used as adown-conversion mixer for extraction of the IF signal at the transistorterminal formed at the interconnected drains used as an IF port.
 6. Themixer arrangement according to claim 5, wherein the source terminal ofthe transistor arrangement is used as an LO signal port for applicationof the LO signal and in that the gate terminal is adapted to be used asan RF signal port.
 7. The mixer arrangement according to claim 5,wherein the source terminal of the transistor arrangement is used as anRF signal port and the gate terminal is used as an LO signal port. 8.The mixer arrangement according to claim 1, wherein the interconnectedgates form a gate terminal used as a single signal port.
 9. The mixerarrangement according to claim 1 wherein the gate terminal is used as anRF signal port for application of an RF signal.
 10. The mixerarrangement according to claim 1, wherein signal filters and/orimpedance matching means are coupled to one or more of the transistorterminals.
 11. The mixer arrangement according claim 1 furthercomprising impedance means provided at the interconnected sources, saidimpedance means setting a DC level, ground or other appropriate leveland to provide for AC-signal separation therefrom, having a high ACimpedance and a low DC impedance, said impedance means optionallycomprising impedance matching means.
 12. The mixer arrangement accordingto claim 1 further comprising an IF filter provided at the terminalacting as an IF port operable to filter out unwanted mixer products fromthe desired signal.
 13. The mixer arrangement according to claim 12,wherein the IF filter comprises a low pass filter.
 14. The mixerarrangement according claim 13, wherein the filter means and/orimpedance matching means are provided at one or more of the terminals.15. The mixer arrangement according claim 1, configured as anup-conversion mixer.
 16. The mixer arrangement according to claim 15,wherein a transistor terminal is formed at the interconnected drains andin that said drain terminal extracts the RF signal.
 17. The mixerarrangement according to claim 15, further comprising impedance meanscoupled to the sources to set a DC-level and in that it comprises a highAC impedance and a low DC-impedance and optionally an impedance matchingfunctionality.
 18. The mixer arrangement according to claim 1, whereinthe gate terminal acts as an IF port for receiving the IF signal and inthat the source terminal acts as an LO port for receiving the LO signal.19. The mixer arrangement according to claim 1, wherein the gateterminal acts as an LO port for receiving the LO signal and the sourceterminal acts as an IF port for receiving the IF signal.
 20. The mixerarrangement according to claim 1, implemented as a Monolithic MicrowaveIntegrated circuit (MMIC).
 21. The mixer arrangement according to claim1, for handling RF and LO signals in the microwave frequency region. 22.The mixer arrangement according to claim 1, for handling RF andLO-signals in the millimeter wave frequency region.